1. Field of the Invention
The present invention relates to a method and related apparatus for maintaining stored data of a dynamic random access memory (DRAM), and more particularly, to a method and related apparatus for self-refreshing a DRAM with a battery device when a computer system enters a power-saving mode.
2. Description of the Prior Art
Today's high-speed microprocessor systems deal with large amounts of data in the daily lives of ordinary people. The most popular microprocessor system is a desktop computer system. By making use of the computer system, people can quickly exchange and handle abundant data to promote efficiency and fun for working and living.
In recent years, the operating speed of the computer system has increased along with the development of the central processing unit (CPU). As the operating speed of the CPU surpasses the frequency of a giga-hertz (GHz), the amount of data that the CPU can handle also increases significantly. However, since the computer system comprises a plurality of components and the data processing speed of each component is not the same, a component with a slow data processing speed will retard the execution efficiency of the whole computer system.
Please refer to FIG. 1. FIG. 1 is a functional block diagram of a first computer system 10 of the prior art. The computer system 10 comprises a CPU 12, a north bridge (NB) chipset 14, a south bridge (SB) chipset 16, a memory 18, a hard disk drive 20, a graphics acceleration card 22, a display device 24, and input equipment 26.
The CPU 12 is for executing the operations of the computer system 10 to implement the integrated functions of the computer system 10. The north bridge chipset 14 is electrically connected to the CPU 12 for handling the data exchange between the CPU 12, the memory 18 as a DRAM, and the graphics acceleration card 22. The display device 16 as a monitor is electrically connected to the graphics acceleration card 14 for providing a visual image output of the computer system 10.
The south bridge chipset 16 is electrically connected to the north bridge chipset 14 for exchanging data with the CPU 12 through the north bridge chipset 14. For example, the south bridge chipset 16 can implement the data exchange between the CPU 12, the input equipment 26, and the hard disk drive 20.
The input equipment 26 includes a keyboard, a mouse, and so on. The memory 18 is a volatile storage media and the hard disk drive 20 is a non-volatile storage media. The data stored in the memory 18 will be lost due to a suspension of power and the data stored in the hard disk drive 20 is free from the influence of power suspension when the computer system 10 is shut down. Therefore, the user stores the data in the hard disk drive 20 to avoid losing the data.
The operations of data processing with the computer system 10 are as follows. The CPU 12 will generate a command to access data on the hard disk drive 20, and the data from the hard disk drive 20 will then be transmitted through the south bridge chipset 16 to the north bridge chipset 14. Afterwards, the north bridge chipset 14 transmits the data from the hard disk drive 20 to the memory 18 for storage. Thus, the CPU 12 can access the data from the hard disk drive 20 in the memory 18 through the north bridge chipset 14 and temporarily store the data in flash memory of the CPU 12 (not shown) for carrying on the additional operations. When the computer system 10 is preparing to be shut down, the data stored in the memory 18 will be transmitted back to the hard disk drive 20 to avoid losing the data.
The access speed of the memory 18 is generally faster than that of the hard disk drive 20. For example, the DRAM memory 18 can operate with an access speed of nano-second (ns) while the hard disk drive 20 operates with the access speed of milli-second (ms). Therefore, the hard disk drive 20 operates slower than the memory 18, and the execution efficiency of the computer system 10 is influenced by the slower speed of the hard disk drive 20. In addition, the hard disk drive 20 can deliver less data per second than the memory 18 can deliver. Therefore, it is beneficial to make use of the memory 18 for shortening the data transmission time and promoting the efficiency of the whole system.
Please refer to FIG. 2. FIG. 2 is a functional block diagram of a second computer system 30 of the prior art. The computer system 30 comprises a CPU 32, a north bridge chipset 34, a south bridge chipset 36, a memory 38, a hard disk drive 40, a graphics acceleration card 42, a display device 44, and input equipment 46. The functions of the components of the computer system 30 are the same with those of the first computer system 10.
The memory 38 comprises a system section 48 and a RAM driver section 50. The system section 48 is used by an operating system (OS) for operations, and the RAM driver section 50 is used temporarily for replacing the hard disk drive 40. The memory site range and the capacity of the RAM driver section 50 in the memory 38 are passed to the operating system during the power-on procedure, and then the operating system will assign a managing program 52 in the system section 48.
The managing program 52 manages data accessing of the RAM driver section 50. When the CPU 32 accesses the hard disk drive 40, the managing program 52 will first intercept an interrupt vector corresponding to the hard disk drive 40 and then transform the format of the signal for accessing the hard disk drive 40 into the format of the signal for accessing the memory 38. At the same time, the managing program 52 will transform the data format in the hard disk drive 40 into the data format of the memory 38, and then the data that is to be stored in the hard disk drive 40 is temporarily stored in the RAM driver section 50 of the memory 38.
Because the access speed of the memory 38 is faster than that of the hard disk drive 40, the CPU 32 can directly access the data from the RAM driver section 50 through the managing program 52 in the memory 38 to carry out operations and quickly store the results in the RAM driver section 50 instead of on the hard disk drive 40.
The computer system 30 controls the transformation between the hard disk drive 40 and the memory 38 by making use of the managing program 52 without the need of modifying the related electric circuit. However, the computer system 30 should still comprise the hard disk drive 40 because the memory 38 is a volatile storage media and the data stored in the memory 38 will be lost due to the suspension of power after the computer system 30 is shut down. Therefore, before the computer system 30 is shut down, the data temporarily stored in the RAM driver section 50 should be transmitted back to the hard disk drive 40 and the hard disk drive 40 installed in the computer system 30 can keep the data.
Please refer to FIG. 3. FIG. 3 is a schematic diagram showing the operations of a computer system of the prior art. According to the format set by the advanced configuration and power interface (ACPI) of the prior art, the operating statuses of the above-mentioned computer systems 10 and 30 can be classified into a soft-off mode 53, a working mode 54, and a sleeping mode 55. When the computer systems 10 and 30 are in the working mode 54, their inner hardware components, such as the CPUs 12 and 32, can get the operating voltages needed to run software programs as well as the operating system. When the computer systems 10 and 30 are idle without performing any application, the computer systems 10 and 30 still provide the operating voltages to their inner hardware components. The above-mentioned situation will generate unnecessary power consumption of the computer systems 10 and 30. According to the ACPI, when the computer systems 10 and 30 are idle, the computer systems 10 and 30 can enter the sleeping mode 55 to avoid the power dissipation.
Generally speaking, the sleeping mode 55 can be subdivided into S1, S2, S3, S4, and S5 modes. Regarding the S4 mode, when the computer systems 10 and 30 execute a suspend-to-disk (STD) operation, the computer systems 10 and 30 have to finish the running programs and the resident programs and temporarily store the current system mode on the hard disk drive to enter the S4 mode.
In addition, when the computer systems 10 and 30 execute a shutdown procedure, the computer systems 10 and 30 also have to execute the STD operation to store the data that is temporarily stored in the memory back on the hard disk drive to avoid losing the data. Afterwards, the computer systems 10 and 30 enter the soft-off mode 53, namely the S5 mode. After the computer systems 10 and 30 are powered-on and leave the soft-off mode 53, similarly to leaving the above-mentioned S4 mode, due to the fact that the system mode is stored on the hard disk drive, the computer systems 10 and 30 can quickly return to the circumstances before the S5 mode, and enter the working mode 54 through accessing the system mode previously stored in the hard disk drive.
Regarding the DRAM, when the computer systems 10 and 30 enter the soft-off mode 53, the computer systems 10 and 30 will not provide the DRAM with the operating voltages for self-refreshing, so the data stored in the DRAM will be lost. Therefore, returning the data temporarily stored in the memory to the hard disk drive before the shutdown procedure can avoid data loss. Since the system modes of the computer systems 10 and 30 will be stored on the hard disk drive, the power-on speeds of the computer systems 10 and 30 are relatively slower.
In the S4 mode, the DRAM can be used to replace the bard disk drive to store the system modes of the computer systems 10 and 30 and the access speed of the DRAM is very quick. However, after the computer systems 10 and 30 are shut down, the data stored in the DRAM will be lost, so the DRAM still cannot replace the non-volatile hard disk drive for quickly powering-on the computer systems 10 and 30.
In addition, the computer system of the prior art can also make use of a non-volatile memory, such as flash memory, as the storage media in the computer system to replace the bard disk drive. Due to the fact that the flash memory and the hard disk drive are both non-volatile storage media, the flash memory can keep the stored data without the need for returning the data to the hard disk drive when the computer system is shut down. However, because the flash memory makes use of the changes of the threshold voltages to record the binary system values, the flash memory takes a much longer time for writing the data than the DRAM does. That is, the access speed of the flash memory is slower than that of the DRAM. Furthermore, the manufacturing cost of the flash memory is higher than that of the DRAM with the same capacity. Therefore, taking the price into consideration, the flash memory is not suitable for the computer system with the need of the large-scale data access applications.